Similar project, gate level emulation of NES CPU+PPU by the Nesticle author Icer Addis.
An entire world in a scanline
Let's see an M-series chip blow that out of the water. ;)
EDIT - It was 4.1Hz in advance mode. Actually runs at between 22Hz and 44hz depending on each time I run it. Odd to have such a wide performance variation. I will just blame Windows and some power management setting/thermal throttling.
- 6502: https://floooh.github.io/visual6502remix/
- Z80: https://floooh.github.io/visualz80remix/
- 2A03 (this was contributed): https://floooh.github.io/visual2a03remix/
- source code: https://github.com/floooh/v6502r
(the simulation generally runs throttled to 1 half-clock-cycle per frame, so don't use it as any sort of benchmark)
youtube.com/watch?si=XuNgnVc4rf86nIgA&t=42
it should'be available here to play online too (but haven't tried it)
https://archive.org/details/257_Educational_Software_The_650...
https://archive.org/details/riag_004_051_-_MECC_Assembly_Lan...
Which was awesome as a kid to finally see what was "going on" inside there.
Get about 10 more hz in Firefox than in Chrome which was unexpected.
[dead]
So you're probably not far off. I can't imagine more modern chips than mine would run it significantly faster, none of the "tweaks" would help here.
Of course it's in JS rather than C, but V8 is really good, well within an order of magnitude - not three - of native, at least with well-written code. I profiled the original Visual6502 and at a glance it sure does look like it's losing a ton of performance to rendering (so good call there).
I have to wonder what the limit is. Even Perfect6502 looks like it's all single-threaded and CPU-driven, which really isn't making the most of modern machines. But I don't know if this is a task that could be efficiently split across cores or dispatched to the GPU (and I can't even begin to know whether SIMD might be useful); of course hardware itself is fundamentally parallel, but the synchronization might kill you?
https://github.com/mist64/perfect6502/blob/09fc542877a843182...
As far as I understood it, this basically re-evaluates the state of a 'dirty list' of transistors though all their connections, and loops until the node list has 'settled' again into a stable state (e.g. state changes from the last loop didn't cause trigger new state changes). Haven't thought about how this could be threaded or simd-ified.